1. Field of the Invention
The present invention relates to a skew adjusting circuit, and in particular, to a skew adjusting circuit for adjusting a skew of a data signal supplied from a semiconductor integrated circuit to an external device against a clock.
2. Description of the Prior Art
In a system that has a plurality of nodes (each of which is composed of an IC), an external device, and a managing CPU that manages the operations and states of the plurality of nodes, when clock signals and data signals are supplied from the plurality of nodes to the external device, it may be necessary to adjust skews of signals between the plurality of nodes and the external device.
In recent years, since the widths of data buses for CPUs, peripheral circuits, and so forth are becoming large, the number of lines for data bit signals contained in data buses is increased. Thus, it is difficult to route all data bit lines in the same length. Consequently, it becomes important to adjust skews of data bit signals.
As a conventional skew adjusting method, while analog waveforms of node outputs are being observed using a measuring device, skews of a plurality of nodes are adjusted so that the specifications of the external device are satisfied. In addition, a clock is supplied from an external clock driver to the external device.
However, in the conventional skew adjusting method, it is troublesome to adjust skews using a measuring device.
Moreover, in recent years, as the speeds of clocks used in CPUs, peripheral circuits, and so forth become high, it is becoming difficult to adjust skews of a plurality of node outputs at a desired timing and supply a clock from a clock driver to the external device at a desired timing.